Customizing a PXI-based Hardware-In-The-Loop Test System with LabVIEW 2010-01-0661

Hardware-in-the-loop (HIL) simulation has become standard practice in the verification process of electronic control units (ECUs). However, new system control concepts continue to drive and expand the requirements for HIL systems. In this maturing application space, there is a natural trend towards the use of commercial-off-the-shelf (COTS) tools and open, multivendor hardware architectures. This open architecture is critical in helping HIL testers meet these requirements in an increasingly cost effective and higher performance manner. Multicore processors today offer performance and flexibility on a scalable computing platform, which furthers this COTS trend. Computer platforms like desktop PCs, CompactPCI and PXI ^{[ 1 ]} (CompactPCI eXtensions for Instrumentation) deliver high-performance systems that allow for the leveraging of multicore processor capabilities in achieving highly realistic plant simulations for controller testing. With the desktop PCs, as well as CompactPCI and PXI machines, test systems can benefit from the low cost and high performance of the latest computer technology in an open industry standard.

This paper discusses the use of a multicore-enabled PXI hardware platform that includes products from multiple vendors in the same system. By combining this platform with an off-the-shelf HIL software product such as NI VeriStand, engineers can achieve end-user customization via programming languages such as C, C++ and NI LabVIEW. Such open programming interfaces for HIL are key to supporting multivendor systems and for creating customer-specific I/O hardware via user-programmable FPGA targets. This paper discusses the following design challenges and corresponding solutions:

• Supporting third-party hardware interfaces like power supplies, reflective memory and protocol boards (i.e. CAN, J1939, LIN, FlexRay)
• Supporting multiple modeling environments
• Incorporating vehicle diagnostic services for automated ECU programming, calibration and troubleshooting
• Designing flexible I/O systems capable of adapting to changing requirements with user-programmable FPGA-based hardware
• Utilizing FPGA-based hardware for subsystem implementation and co-simulation
• Distributing test system tasks and models across processors and processor cores to increase system bandwidth